Toshiba Develops 3D Memory Cell Array Structure for NAND Flash
June 15, 2007
Resorting to innovative memory stacking process instead of advanced process technology, Toshiba has developed a 3D memory cell array structure for NAND flash memory, as the company announced on June 12, 2007. Known as the SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) structure, the stacking formula creates vertical pillars of stacked memory elements passing through multiple layers of gate electrodes and insulator films. By doing so, the SONOS structure is able to enhance cell density and data capacity without substantially augmenting the chip size. Details as to the commercialization of the technology have not been provided by Toshiba yet.