TSMC recently announced that it has teamed up with Broadcom with an aim to support its industry’s first and largest 2X reticle size interposer by optimizing the performance of the CoWoS (Chip-on-Wafer-on-Substrate) platform, the Economic Daily News reported on March 4. Having the capability of supporting more SoCs (System on Chips) and TSMC’s next generation 5nm process technology, and offering up to 96GB of memory, the optimized CoWoS solution can bolster memory-intensive workloads such as deep learning, 5G networking, and datacenters while providing greater design flexibility and yield for ASICs (Application-Specific Integrated Circuits). TSMC’s 5nm node is projected to enter volume production in the first half of 2020 while its 7nm node will become mainstream this year. Both 5nm and 7nm nodes will likely to account for over 30% of TSMC’s annual revenue in 2020, according to the same source.
This also unveils TSMC’s ambition to expand its foothold into the advanced packaging service, on which TSMC has spent 10% of annual capital expenditure over the past two years. In 2019, the company allocated US$15 billion for advanced packaging and the funding is estimated to increase to US$16 billion this year.